C8051F52X_12 Datasheet, PDF (181/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
SFR Definition 17.17. LIN0MUL: LIN0 Multiplier Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
PRESCL[1:0]
LINMUL[4:0]
DIV9
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Address: 0x0D (indirect)
Bit7–6:
Bit5–1:
Bit0:
PRESCL1–0: LIN Baud Rate Prescaler Bits.
These bits are the baud rate prescaler bits.
LINMUL4–0: LIN Baud Rate Multiplier Bits.
These bits are the baud rate multiplier bits. These bits are not used in slave mode.
DIV9: LIN Baud Rate Divider Most Significant Bit.
The most significant bit of the baud rate divider. The 8 least significant bits are in LIN0DIV.
The valid range for the divider is 200 to 511.
SFR Definition 17.18. LIN0ID: LIN0 ID Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ID[5:0]
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
R/W
Reset Value
00000000
Bit0
Address: 0x0E (indirect)
Bit7–6: UNUSED. Read = 00b. Write = don’t care.
Bit5–0: ID5–0: LIN Identifier Bits.
These bits form the data identifier.
If the LINSIZE bits (LIN0SIZE[3:0]) are 1111b, bits ID[5:4] are used to determine the data
size and are interpreted as follows:
00: 2 bytes
01: 2 bytes
10: 4 bytes
11: 8 bytes
Rev. 1.4
181