HD64F7144F50V Datasheet, PDF (907/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

D. I/O Port Block Diagrams
AUDATAm (AUD)
Function 1
TIOCxx (MTU)
RES
R
Q PEnDR D
C
PEDRL.WR
PEDRL.RD
TIOCxx (MTU)
AUDATAm (AUD)
PFC
Q PEnMD0
Q PEnMD1
AUDSYNC
AUD reset
AUDMD
Q PEnIOR
SBYCR
Software standby
Q Hi-Z
AUD module standby
RES: Reset signal
PEDRL.RD: Port E data register L read signal
PEDRL.WR: Port E data register L write signal
Figure D.49 PEn/TIOCxx/Function 1/AUDATAm
Pins
PE3/TIOC0D/
DRAK1/
AUDATA3
PE5/TIOC1B/
TXD3/
AUDATA1
Symbol in Figure D.49
Available Products
SH7144
SH7145
Masked ROM
Masked ROM
version/
version/
Function
F-ZTAT ROM less F-ZTAT ROM less
PEn TIOCxx 1
AUDATAm _{version version}
version version
PE3 TIOC0D DRAK1 AUDATA3 ⎯
⎯
(MTU) (DMAC) (AUD)
√
⎯
PE5 TIOC1B TXD3 AUDATA1 ⎯
⎯
(MTU) (SCI) (AUD)
√
⎯
Rev.4.00 Mar. 27, 2008 Page 861 of 882
REJ09B0108-0400