HD64F7144F50V Datasheet, PDF (41/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Tables
Section 2 CPU
Table 2.1 Initial Values of Registers.......................................................................................18
Table 2.2 Sign Extension of Word Data .................................................................................21
Table 2.3 Delayed Branch Instructions...................................................................................22
Table 2.4 T Bit ........................................................................................................................22
Table 2.5 Immediate Data Accessing......................................................................................23
Table 2.6 Absolute Address Accessing...................................................................................23
Table 2.7 Displacement Accessing .........................................................................................24
Table 2.8 Addressing Modes and Effective Addresses...........................................................25
Table 2.9 Instruction Formats .................................................................................................29
Table 2.10 Classification of Instructions ..................................................................................32
Section 3 MCU Operating Modes
Table 3.1 Selection of Operating Modes.................................................................................47
Table 3.2 Clock Mode Setting ................................................................................................48
Table 3.3 Pin Configuration....................................................................................................49
Section 4 Clock Pulse Generator
Table 4.1 Operating Clock for Each Module ..........................................................................54
Table 4.2 Damping Resistance Values (Recommended Values) ............................................55
Table 4.3 Crystal Resonator Characteristics ...........................................................................56
Section 5 Exception Processing
Table 5.1 Types of Exception Processing and Priority Order .................................................61
Table 5.2 Timing for Exception Source Detection and Start of Exception Processing...........62
Table 5.3 Exception Processing Vector Table ........................................................................63
Table 5.4 Calculating Exception Processing Vector Table Addresses....................................64
Table 5.5 Reset Status.............................................................................................................65
Table 5.6 Bus Cycles and Address Errors...............................................................................67
Table 5.7 Interrupt Sources.....................................................................................................69
Table 5.8 Interrupt Priority .....................................................................................................70
Table 5.9 Types of Exceptions Triggered by Instructions ......................................................71
Table 5.10 Generation of Exception Sources Immediately after Delayed Branch
Instruction or Interrupt-Disabled Instruction ..........................................................73
Table 5.11 Stack Status after Exception Processing Ends ........................................................74
Section 6 Interrupt Controller (INTC)
Table 6.1 Pin Configuration....................................................................................................79
Table 6.2 Interrupt Exception Processing Vectors and Priorities............................................90
Table 6.3 Interrupt Response Time.........................................................................................96
Rev.4.00 Mar. 27, 2008, Page xxxix of xliv
REJ09B0108-0400