HD64F7144F50V Datasheet, PDF (613/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

16. Compare Match Timer (CMT)
16.5.2 Contention between CMCNT Word Write and Counter Incrementation
If an increment occurs during the T2 state of the CMCNT counter word write cycle, the counter
write has priority, so no increment occurs. Figure 16.7 shows the timing.
CMCNT write cycle
T1 T2
Pφ
Address
CMCNT
Internal write
signal
CMCNT
input clock
CMCNT
N
M
CMCNT write data
Figure 16.7 CMCNT Word Write and Increment Contention
Rev.4.00 Mar. 27, 2008 Page 567 of 882
REJ09B0108-0400