HD64F7144F50V Datasheet, PDF (657/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

17. Pin Function Controller (PFC)
Register Bit
Initial
Bit Name Value R/W Description
PCCR 3
PC3MD 0*
R/W PC3 Mode
Selects the function of the PC3/A3 pin.
0: PC3 I/O (port)
1: A3 output (BSC)
PCCR 2
PC2MD 0*
R/W PC2 Mode
Selects the function of the PC2/A2 pin.
0: PC2 I/O (port)
1: A2 output (BSC)
PCCR 1
PC1MD 0*
R/W PC1 Mode
Selects the function of the PC1/A1 pin.
0: PC1 I/O (port)
1: A1 output (BSC)
PCCR 0
PC0MD 0*
R/W PC0 Mode
Selects the function of the PC0/A0 pin.
0: PC0 I/O (port)
1: A0 output (BSC)
Note: * The initial value is 1 in the on-chip ROM disabled external-expansion mode.
17.1.7 Port D I/O Registers L, H (PDIORL, PDIORH)
The port D I/O registers L and H (PDIORL and PDIORH) are 16-bit readable/writable registers
that are used to set the pins on port D as inputs or outputs. Bits PD31IOR to PD0IOR correspond
to pins PD31 to PD0 (names of multiplexed pins are here given as port names and pin numbers
alone). PDIORL is enabled when the port D pins are functioning as general-purpose inputs/outputs
(PD15 to PD0). In other states, PDIORL is disabled. PDIORH is enabled when the port D pins are
functioning as general-purpose inputs/outputs (PD31 to PD16). In other states, PDIORH is
disabled.
A given pin on port D will be an output pin if the corresponding bit in PDIORL or PDIORH is set
to 1, and an input pin if the bit is cleared to 0.
Note that bits 15 to 0 in PDIORH are disabled in the SH7144.
The initial value of PDIOR is H'0000.
Rev.4.00 Mar. 27, 2008 Page 611 of 882
REJ09B0108-0400