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HD64F7144F50V Datasheet, PDF (832/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
26. Electrical Characteristics
26.3.9 Serial Communication Interface (SCI) Timing
Table 26.11 shows serial communication interface timing.
Table 26.11 Serial Communication Interface Timing
Conditions: VCC = PLLVCC =3.3 V ± 0.3 V, AVCC = 3.3 V ± 0.3 V, AVCC = VCC ± 0.3 V,
AVref = 3.0 V to AVCC , VSS = PLLVSS = AVSS = 0 V, Ta = –20°C to +75°C
(regular specifications), Ta = –40°C to +85°C (wide-range specifications),
When programming or erasing flash memory, Ta = –20°C to +75°C.
Item
Input clock cycle (asynchronous)
Input clock cycle (clock sync)
Input clock pulse width
Input clock rise time
Input clock fall time
Transmit data delay time asynchronous
Received data setup time
Received data hold time
Transmit data delay time clock sync
Received data setup time (When SCK
Received data hold time input)
Transmit data delay time clock sync
Received data setup time (When SCK
Received data hold time output)
Symbol Min.
Max.
tscyc
4
⎯
t
6
⎯
scyc
t
0.4
0.6
sckw
t
⎯
1.5
sckr
tsckf
⎯
1.5
tTxD
⎯
100
tRxS
100
⎯
tRxH
100
⎯
tTxD
⎯
tpcyc + 43
t
t + 25 ⎯
RxS
pcyc
t
t + 25 ⎯
RxH
pcyc
t
⎯
65
TxD
t
0.5 t + 50 ⎯
RxS
pcyc
tRxH
1.5 tpcyc
⎯
Unit
tpcyc
t
pcyc
t
scyc
t
pcyc
tpcyc
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure
Figure
26.19
Figure
26.20
Rev.4.00 Mar. 27, 2008 Page 786 of 882
REJ09B0108-0400