HD64F7144F50V Datasheet, PDF (772/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

24. Power-Down Modes
• MSTCR2
Bit
Bit Name Initial Value R/W
15, 14 —
All 1
R
13
MSTP13 1
R/W
12
MSTP12 1
R/W
11 to 8 —
All 0
R
7, 6 —
All 1
R
5
MSTP5 1
R/W
4
MSTP4 1
R/W
Description
Reserved
This bit is always read as 1, and should always be
written with 1.
Multi-function timer pulse unit (MTU)
Compare match timer (CMT)
Reserved
These bits are always read as 0, and should always
be written with 0.
Reserved
These bits are always read as 1, and should always
be written with 1.
A/D converter (A/D1)
A/D converter (A/D0)
3
MSTP3 0
R/W Advanced user debugger (AUD)*
2
MSTP2 0
R/W User debugging interface (H-UDI)*
1
—
0
0
MSTP0 0
R
Reserved
This bit is always read as 0, and should always be
written with 0.
R/W User break controller (UBC)
Note: * Although this bit can be read from/written to when using E10A (in DBGMD=H), AUD or
H-UDI is in normal operation regardless of the set value.
Rev.4.00 Mar. 27, 2008 Page 726 of 882
REJ09B0108-0400