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| HD64F7144F50V Datasheet, PDF (732/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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19. Flash Memory (F-ZTAT Version)
Wait time: tsswe
Programmable/
erasable
Wait time:100μs
CK
tOSC1
Vcc
min 0μs
FWP
MD3 to MD0*1
RES
SWE bit
tMDS*3
SWE set
SWE clear
Prohibition time of accessing flash memory
(tsswe : Wait time after SWE set)*2
Reprogrammable time of flash memory
(Prohibition of program execution on flash memory and of reading data except verify)
Notes: 1. Levels of mode pins (MD3 to MD0) should be fixed to pull down or pull up until power-off except mode
switchimg occasion.
2. See section 26.5, Flash Memory Characteristics.
3. See section 26.3.3, Control Signal Timing.
Figure 19.12 Power On/Off Timing (User Program Mode)
Rev.4.00 Mar. 27, 2008 Page 686 of 882
REJ09B0108-0400
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