HD64F7144F50V Datasheet, PDF (740/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

22. User Debugging Interface (H-UDI)
22.1.2 Block Diagram
Figure 22.1 shows a block diagram of the H-UDI.
TCK
TMS
TRST
TAP
controller
Internal
bus
controller
H-UDI
interrupt
signal
TDI
Decoder
SDBPR
TDO
Mux
SDIR
SDSR
SDDRH
16
SDDRL
[Legend]
SDIR: Instruction register
SDSR: Status register
SDDRH: Data register H
SDDRL: Data register L
SDBPR: Bypass register
TCK: Test clock
TMS: Test mode select
TRST: Test reset
TDI: Test data input
TDO: Test data output
Figure 22.1 H-UDI Block Diagram
Rev.4.00 Mar. 27, 2008 Page 694 of 882
REJ09B0108-0400