HD64F7144F50V Datasheet, PDF (296/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

11. Multi-Function Timer Pulse Unit (MTU)
11.3.8 Timer Start Register (TSTR)
TSTR is an 8-bit readable/writable register that selects operation/stoppage for channels 0 to 4.
When setting the operating mode in TMDR or setting the count clock in TCR, first stop the TCNT
counter.
Bit Bit Name Initial Value R/W
7 CST4
0
R/W
6 CST3
0
R/W
5 to 3 —
All 0
R
2 CST2
0
R/W
1 CST1
0
R/W
0 CST0
0
R/W
Description
Counter Start 4 and 3
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but
the TIOC pin output compare output level is retained.
If TIOR is written to when the CST bit is cleared to 0,
the pin output level will be changed to the set initial
output value.
0: TCNT_4 and TCNT_3 count operation is stopped
1: TCNT_4 and TCNT_3 performs count operation
Reserved
These bits are always read as 0. The write value
should always be 0.
Counter Start 2 to 0
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but
the TIOC pin output compare output level is retained.
If TIOR is written to when the CST bit is cleared to 0,
the pin output level will be changed to the set initial
output value.
0: TCNT_2 to TCNT_0 count operation is stopped
1: TCNT_2 to TCNT_0 performs count operation
11.3.9 Timer Synchronous Register (TSYR)
TSYR is an 8-bit readable/writable register that selects independent operation or synchronous
operation for the channel 0 to 4 TCNT counters. A channel performs synchronous operation when
the corresponding bit in TSYR is set to 1.
Rev.4.00 Mar. 27, 2008 Page 250 of 882
REJ09B0108-0400