HD64F7144F50V Datasheet, PDF (120/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

5. Exception Processing
5.7 Stack Status after Exception Processing Ends
The status of the stack after exception processing ends is shown in table 5.11.
Table 5.11 Stack Status after Exception Processing Ends
Types
Address error
Stack Status
SP
Address of instruction
after executed instruction
32 bits
SR
32 bits
Trap instruction
SP
Address of instruction
after TRAPA instruction
32 bits
SR
32 bits
General illegal instruction
SP ^A_{gedndereraslsilolefg}^{inasl tirnuscttriuocntioanfter32} bits
SR
32 bits
Interrupt
SP
Address of instruction
after executed instruction
32 bits
SR
32 bits
Illegal slot instruction
SP
Jump destination address
of delay branch instruction
32
bits
SR
32 bits
Rev.4.00 Mar. 27, 2008 Page 74 of 882
REJ09B0108-0400