HD64F7144F50V Datasheet, PDF (517/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

14. I²C Bus Interface (IIC) Option
14.3 Description of Registers
The I²C bus interface includes the following registers for each channel. For the addresses of these
registers and the states of the registers in each state of processing, refer to section 25, List of
Registers. Registers ICDR and SARX and registers ICMR and SAR are allocated to the same
addresses, and accessible registers differ depending on the state of ICE bit in ICCR. When the ICE
bit is 0, SAR and SARX can be accessed, and when the ICE bit is 1, ICMR and ICDR can be
accessed.
• I²C bus control register (ICCR)
• I²C bus status register (ICSR)
• I²C bus data register (ICDR)
• I²C bus mode register (ICMR)
• Slave-address register (SAR)
• Second slave-address register (SARX)
• Serial control register X (SCRX)
14.3.1 I²C Bus Data Register (ICDR)
ICDR is an 8-bit readable/writable register that holds the data for transmission during
transmission, and holds the received data during reception. Internally, ICDR consists of a shift
register (ICDRS), receive buffer (ICDRR), and transmission buffer (ICDRT).
Data is automatically transferred between these three registers according to the bus state; this
affects the states of flags, such as the ICDRF flag in SCRX and the internal flag ICDRE.
In master transmit mode of the I²C bus format, writing transmit data to ICDR should be performed
after start condition is detected. When the start condition is detected, previous write data is
ignored. In slave transmit mode, writing should be performed after the slave addresses match and
the TRS bit is automatically changed to 1.
When I²C is in transmit mode (TRS = 1) and the next transmit data is in ICDRT (the ICDRE flag
is 0), data is transferred automatically from ICDRT to ICDRS after successful transmission of one
frame of data using ICDRS. When the ICDRE flag is 1 and the next transmit data writing is
waited, data is transferred automatically from ICDRT to ICDRS by writing to ICDR. In receive
mode (TRS = 0), no data is transferred from ICDRT to ICDRS. Note that data should not be
written to ICDR in receive mode.
Reading receive data from ICDR is performed after data is transferred from ICDRS to ICDRR.
Rev.4.00 Mar. 27, 2008 Page 471 of 882
REJ09B0108-0400