HD64F7144F50V Datasheet, PDF (417/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

11. Multi-Function Timer Pulse Unit (MTU)
Bit Bit Name Initial value
15
POE3F 0
14
POE2F 0
13
POE1F 0
12
POE0F 0
11 to 9 ⎯
All 0
R/W Description
R/(W)* POE3 Flag
This flag indicates that a high impedance request has
been input to the POE3 pin
[Clearing condition]
• By writing 0 to POE3F after reading a POE3F = 1
[Setting condition]
• When the input set by ICSR1 bits 7 and 6 occurs
at the POE3 pin
R/(W)* POE2 Flag
This flag indicates that a high impedance request has
been input to the POE2 pin
[Clearing condition]
• By writing 0 to POE2F after reading a POE2F = 1
[Setting condition]
• When the input set by ICSR1 bits 5 and 4 occurs
at the POE2 pin
R/(W)* POE1 Flag
This flag indicates that a high impedance request has
been input to the POE1 pin
[Clearing condition]
• By writing 0 to POE1F after reading a POE1F = 1
[Setting condition]
• When the input set by ICSR1 bits 3 and 2 occurs
at the POE1 pin
R/(W)* POE0 Flag
This flag indicates that a high impedance request has
been input to the POE0 pin
[Clear condition]
• By writing 0 to POE0F after reading a POE0F = 1
[Set condition]
• When the input set by ICSR1 bits 1 and 0 occurs
at the POE0 pin
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev.4.00 Mar. 27, 2008 Page 371 of 882
REJ09B0108-0400