HD64F7144F50V Datasheet, PDF (752/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

23. Advanced User Debugger (AUD)
23.1.2 Block Diagram
Figure 23.1 shows a block diagram of the AUD.
AUDATA0
AUDATA1
AUDATA2
AUDATA3
AUDRST
AUDMD
AUDCK
AUDSYNC
PC output circuit
Address buffer
Data buffer
Mode control
Bus
controller
Internal Peripheral
bus
module bus
On-chip
memory
CPU
On-chip
peripheral
module
Figure 23.1 AUD Block Diagram
Rev.4.00 Mar. 27, 2008 Page 706 of 882
REJ09B0108-0400