HD64F7144F50V Datasheet, PDF (830/932 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

26. Electrical Characteristics
26.3.7 I/O Port Timing
Table 26.9 shows I/O port timing.
Table 26.9 I/O Port Timing
Conditions: V_CC = PLLV_CC =3.3 V ± 0.3 V, AV_CC = 3.3 V ± 0.3 V, AV_CC = V_CC ± 0.3 V,
AV_ref = 3.0 V to AV_CC , V_SS = PLLV_SS = AV_SS = 0 V, T_a = –20°C to +75°C
(regular specifications), T_a = –40°C to +85°C (wide-range specifications),
When programming or erasing flash memory, T_a = –20°C to +75°C.
Item
Port output data delay time
Port input hold time
Port input setup time
Symbol
t_PWD
t
PRH
t
PRS
Min.
⎯
19
19
Max.
100
⎯
⎯
Unit
Figure
ns
Figure 26.17
ns
ns
[Operating precautions]
The port input signals are asynchronous. They are, however, considered to have been changed at
CK clock fall with two-state intervals shown in figure 26.17. If the setup times shown here are not
observed, recognition may be delayed until the clock fall two states after that timing.
CK
Port
(read)
Port
(write)
t_PRS t_PRH
t_PWD
Figure 26.17 I/O Port Input/Output timing
Rev.4.00 Mar. 27, 2008 Page 784 of 882
REJ09B0108-0400