PIC18F44J50-I Datasheet, PDF (78/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
6.1.1 HARD MEMORY VECTORS
All PIC18 devices have a total of three hard-coded
return vectors in their program memory space. The
Reset vector address is the default value to which the
Program Counter returns on all device Resets; it is
located at 0000h.
PIC18 devices also have two interrupt vector
addresses for handling high-priority and low-priority
interrupts. The high-priority interrupt vector is located at
0008h and the low-priority interrupt vector at 0018h.
Figure 6-2 provides their locations in relation to the
program memory map.
FIGURE 6-2:
HARD VECTOR AND
CONFIGURATION WORD
LOCATIONS FOR
PIC18F46J50 FAMILY
DEVICES
Reset Vector
0000h
High-Priority Interrupt Vector 0008h
Low-Priority Interrupt Vector 0018h
On-Chip
Program Memory
6.1.2 FLASH CONFIGURATION WORDS
Because PIC18F46J50 family devices do not have
persistent configuration memory, the top four words of
on-chip program memory are reserved for configuration
information. On Reset, the configuration information is
copied into the Configuration registers.
The Configuration Words are stored in their program
memory location in numerical order, starting with the
lower byte of CONFIG1 at the lowest address and
ending with the upper byte of CONFIG4.
Table 6-1 provides the actual addresses of the Flash
Configuration Word for devices in the PIC18F46J50
family. Figure 6-2 displays their location in the memory
map with other memory vectors.
Additional details on the device Configuration Words
are provided in Section 27.1 “Configuration Bits”.
TABLE 6-1:
FLASH CONFIGURATION
WORD FOR PIC18F46J50
FAMILY DEVICES
Device
Program
Memory
(Kbytes)
Configuration
Word
Addresses
PIC18F24J50
PIC18F44J50
PIC18F25J50
PIC18F45J50
PIC18F26J50
PIC18F46J50
16
3FF8h to 3FFFh
32
7FF8h to 7FFFh
64
FFF8h to FFFFh
Flash Configuration Words ^{(Top of Memory-7)}
(Top of Memory)
Read as ‘0’
Legend:
1FFFFFh
(Top of Memory) represents upper boundary
of on-chip program memory space (see
Figure 6-1 for device-specific values).
Shaded area represents unimplemented
memory. Areas are not shown to scale.
DS39931D-page 78
 2011 Microchip Technology Inc.