PIC18F44J50-I Datasheet, PDF (248/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

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18.2 Capture Mode
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 or TMR3
registers when an event occurs on the corresponding
ECCPx pin. An event is defined as one of the following:
• Every falling edge
• Every rising edge
• Every 4^th rising edge
• Every 16^th rising edge
The event is selected by the mode select bits,
CCPxM<3:0>, of the CCPxCON register. When a
capture is made, the interrupt request flag bit, CCPxIF,
is set; it must be cleared by software. If another capture
occurs before the value in register CCPRx is read, the
old captured value is overwritten by the new captured
value.
18.2.1 ECCP PIN CONFIGURATION
In Capture mode, the appropriate ECCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
Additionally, the ECCPx input function needs to be
assigned to an I/O pin through the Peripheral Pin
Select module. For details on setting up the
remappable pins, see Section 10.7 “Peripheral Pin
Select (PPS)”.
Note:
If the ECCPx pin is configured as an
output, a write to the port can cause a
capture condition.
18.2.2 TIMER1/TIMER3 MODE SELECTION
The timers that are to be used with the capture feature
(Timer1 and/or Timer3) must be running in Timer mode
or Synchronized Counter mode. In Asynchronous
Counter mode, the capture operation may not work.
The timer to be used with each ECCP module is
selected in the TCLKCON register (Register 13-3).
18.2.3 SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false interrupts.
The interrupt flag bit, CCPxIF, should also be cleared
following any such change in operating mode.
18.2.4 ECCP PRESCALER
There are four prescaler settings in Capture mode; they
are specified as part of the operating mode selected by
the mode select bits (CCPxM<3:0>). Whenever the
ECCP module is turned off, or Capture mode is dis-
abled, the prescaler counter is cleared. This means
that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 18-1 provides the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 18-1: CHANGING BETWEEN
CAPTURE PRESCALERS
CLRF
MOVLW
MOVWF
CCP1CON
; Turn CCP module off
NEW_CAPT_PS ; Load WREG with the
; new prescaler mode
; value and CCP ON
CCP1CON
; Load CCP1CON with
; this value
FIGURE 18-1:
CAPTURE MODE OPERATION BLOCK DIAGRAM
ECCP1 Pin
Prescaler
 1, 4, 16
Set CCP1IF
TCLKCON (<T3CCP<2:1>)
and
Edge Detect
TCLKCON (<T3CCP<2:1>)
CCP1CON<3:0> ⁴
Q1:Q4 ⁴
TMR3H
TMR3L
TMR3
Enable
CCPR1H
TMR1
Enable
CCPR1L
TMR1H TMR1L
DS39931D-page 248
 2011 Microchip Technology Inc.