PIC18F44J50-I Datasheet, PDF (555/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
T4CON (Timer4 Control) .......................................... 223
TCLKCON (Timer Clock Control) ..................... 202, 215
TXSTAx (Transmit Status and Control) ................... 324
UADDR .................................................................... 365
UCFG (USB Configuration) ...................................... 361
UCON (USB Control) ............................................... 359
UEIE (USB Error Interrupt Enable) .......................... 377
UEIR (USB Error Interrupt Status) ........................... 376
UEPn (USB Endpoint n Control) .............................. 364
UFRMH:UFRML ....................................................... 365
UIE (USB Interrupt Enable) ...................................... 375
UIR (USB Interrupt Status) ...................................... 373
USTAT (USB Status) ............................................... 363
WDTCON (Watchdog Timer Control) ...................... 428
WKDY (Weekday Value) .......................................... 232
YEAR (Year Value) .................................................. 231
RESET ............................................................................. 465
Reset .................................................................................. 63
Brown-out Reset ........................................................ 65
Brown-out Reset (BOR) ............................................. 63
Configuration Mismatch (CM) .................................... 63
Configuration Mismatch Reset ................................... 66
Deep Sleep ................................................................ 63
Fast Register Stack .................................................... 81
MCLR ......................................................................... 65
MCLR Reset, During Power-Managed Modes ........... 63
MCLR Reset, Normal Operation ................................ 63
Power-on Reset ......................................................... 65
Power-on Reset (POR) .............................................. 63
Power-up Timer ......................................................... 66
RESET Instruction ..................................................... 63
Stack Full Reset ......................................................... 63
Stack Underflow Reset .............................................. 63
State of Registers ...................................................... 68
Watchdog Timer (WDT) Reset ................................... 63
Resets .............................................................................. 417
Brown-out Reset (BOR) ........................................... 417
Oscillator Start-up Timer (OST) ............................... 417
Power-on Reset (POR) ............................................ 417
Power-up Timer (PWRT) ......................................... 417
RETFIE ............................................................................ 466
RETLW ............................................................................ 466
RETURN .......................................................................... 467
Return Address Stack ........................................................ 79
Associated Registers ................................................. 79
Revision History ............................................................... 545
RLCF ................................................................................ 467
RLNCF ............................................................................. 468
RRCF ............................................................................... 468
RRNCF ............................................................................ 469
RTCC
Alarm ........................................................................ 241
Configuring ...................................................... 241
Interrupt ........................................................... 242
Mask Settings .................................................. 241
Alarm Value Registers (ALRMVAL) ......................... 234
Control Registers ..................................................... 227
Low-Power Modes ................................................... 242
Operation
Calibration ....................................................... 240
Clock Source ................................................... 238
Digit Carry Rules ............................................. 238
General Functionality ....................................... 239
Leap Year ........................................................ 239
Register Mapping ............................................ 239
ALRMVAL ................................................ 240
RTCVAL .................................................. 240
Safety Window for Register Reads
and Writes ............................................... 239
Write Lock ........................................................ 239
Register Interface .................................................... 237
Register Maps ......................................................... 243
Alarm Value ..................................................... 243
RTCC Control .................................................. 243
RTCC Value .................................................... 243
Reset ....................................................................... 242
Device ............................................................. 242
Power-on Reset (POR) .................................... 242
Value Registers (RTCVAL) ...................................... 231
RTCEN Bit Write .............................................................. 237
S
SCKx ............................................................................... 270
SDIx ................................................................................. 270
SDOx ............................................................................... 270
SEC_IDLE Mode ............................................................... 52
SEC_RUN Mode ................................................................ 48
Serial Clock, SCKx .......................................................... 270
Serial Data In (SDIx) ........................................................ 270
Serial Data Out (SDOx) ................................................... 270
Serial Peripheral Interface. See SPI Mode.
SETF ............................................................................... 469
Shoot-Through Current .................................................... 263
Slave Select (SSx) ........................................................... 270
SLEEP ............................................................................. 470
Software Simulator (MPLAB SIM) ................................... 487
Special Event Trigger. See Compare (ECCP Mode).
Special Features of the CPU ........................................... 417
SPI Mode (MSSP) ........................................................... 270
Associated Registers ............................................... 279
Bus Mode Compatibility ........................................... 278
Clock Speed, Interactions ........................................ 278
DMA Module ............................................................ 280
I/O Pin Considerations ..................................... 280
Idle and Sleep ................................................. 280
RAM to RAM Copy .......................................... 280
Registers ......................................................... 280
Effects of a Reset .................................................... 278
Enabling SPI I/O ...................................................... 274
Master Mode ............................................................ 275
Master/Slave Connection ........................................ 274
Operation ................................................................. 273
Open-Drain Output Option ............................... 273
Operation in Power-Managed Modes ...................... 278
Registers ................................................................. 271
Serial Clock ............................................................. 270
Serial Data In ........................................................... 270
Serial Data Out ........................................................ 270
Slave Mode .............................................................. 276
Slave Select ............................................................. 270
Slave Select Synchronization .................................. 276
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