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PIC18F44J50-I Datasheet, PDF (476/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers | |||
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PIC18F46J50 FAMILY
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Exclusive OR W with f
XORWF f {,d {,a}}
0 ï£ f ï£ 255
d ï [0,1]
a ï [0,1]
(W) .XOR. (f) ï®ï dest
N, Z
0001 10da ffff ffff
Exclusive OR the contents of W with
register, âfâ. If âdâ is â0â, the result is
stored in W. If âdâ is â1â, the result is
stored back in the register âfâ (default).
If âaâ is â0â, the Access Bank is selected.
If âaâ is â1â, the BSR is used to select the
GPR bank (default).
If âaâ is â0â and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ï£ï 95 (5Fh). See
Section 28.2.3 âByte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Modeâ for details.
1
1
Q2
Read
register âfâ
Q3
Process
Data
Q4
Write to
destination
Example:
XORWF
Before Instruction
REG
W
= AFh
= B5h
After Instruction
REG
W
= 1Ah
= B5h
REG, 1, 0
DS39931D-page 476
ï£ 2011 Microchip Technology Inc.
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