PIC18F44J50-I Datasheet, PDF (253/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
18.5 PWM (Enhanced Mode)
The Enhanced PWM mode can generate a PWM signal
on up to four different output pins with up to 10 bits of
resolution. It can do this through four different PWM
Output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the PxM bits of the
CCPxCON register must be set appropriately.
The PWM outputs are multiplexed with I/O pins and are
designated: PxA, PxB, PxC and PxD. The polarity of the
PWM pins is configurable and is selected by setting the
CCPxM bits in the CCPxCON register appropriately.
Table 18-1 provides the pin assignments for each
Enhanced PWM mode.
Figure 18-5 provides an example of a simplified block
diagram of the Enhanced PWM module.
Note:
To prevent the generation of an
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
FIGURE 18-5:
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Duty Cycle Registers
CCPR1L
DC1B<1:0>
CCPR1H (Slave)
Comparator
R
TMR2
(1)
S
Comparator
PR2
Clear Timer2,
Toggle PWM Pin and
Latch Duty Cycle
PxM<1:0>
CCPxM<3:0>
2
4
ECCPx/PxA⁽²⁾
TRIS
PxB⁽²⁾
Q
Output
Controller
TRIS
PxC⁽²⁾
TRIS
PxD⁽²⁾
TRIS
ECCP1DEL
ECCP1/RPn
RPn
PRn
PRn
Note 1: The 8-bit TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler, to create
the 10-bit time base.
2: These pins are remappable.
Note 1: The TRIS register value for each PWM output must be configured appropriately.
2: Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
 2011 Microchip Technology Inc.
DS39931D-page 253