PIC18F44J50-I Datasheet, PDF (206/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
13.5.1
USING TIMER1 AS A
CLOCK SOURCE
The Timer1 oscillator is also available as a clock source
in power-managed modes. By setting the clock select
bits, SCS<1:0> (OSCCON<1:0>), to ‘01’, the device
switches to SEC_RUN mode; both the CPU and
peripherals are clocked from the Timer1 oscillator. If the
IDLEN bit (OSCCON<7>) is cleared and a SLEEP
instruction is executed, the device enters SEC_IDLE
mode. Additional details are available in Section 4.0
“Low-Power Modes”.
Whenever the Timer1 oscillator is providing the clock
source, the Timer1 system clock status flag, T1RUN
(TCLKCON<4>), is set. This can be used to determine
the controller’s current clocking mode. It can also
indicate the clock source currently being used by the
Fail-Safe Clock Monitor. If the Clock Monitor is enabled
and the Timer1 oscillator fails while providing the clock,
polling the T1RUN bit will indicate whether the clock is
being provided by the Timer1 oscillator or another
source.
13.5.2
TIMER1 OSCILLATOR LAYOUT
CONSIDERATIONS
The Timer1 oscillator circuit draws very little power
during operation. Due to the low-power nature of the
oscillator, it may also be sensitive to rapidly changing
signals in close proximity. This is especially true when
the oscillator is configured for extremely Low-Power
mode (LPT1OSC = 0).
The oscillator circuit, displayed in Figure 13-2, should
be located as close as possible to the microcontroller.
There should be no circuits passing within the oscillator
circuit boundaries other than VSS or VDD.
If a high-speed circuit must be located near the
oscillator (such as the ECCP1 pin in Output Compare
or PWM mode, or the primary oscillator using the
OSC2 pin), a grounded guard ring around the oscillator
circuit, as displayed in Figure 13-3, may be helpful
when used on a single-sided PCB or in addition to a
ground plane.
FIGURE 13-3:
OSCILLATOR CIRCUIT
WITH GROUNDED
GUARD RING
VDD
VSS
OSC1
OSC2
RC0
RC1
Note: Not drawn to scale.
RC2
In the Low Drive Level mode, LPT1OSC = 0, it is critical
that the RC2 I/O pin signals be kept away from the
oscillator circuit. Configuring RC2 as a digital output,
and toggling it, can potentially disturb the oscillator
circuit, even with relatively good PCB layout. If
possible, it is recommended to either leave RC2
unused, or use it as an input pin with a slew rate limited
signal source. If RC2 must be used as a digital output,
it may be necessary to use the Higher Drive Level
Oscillator mode (LPT1OSC = 1) with many PCB lay-
outs. Even in the High Drive Level mode, careful layout
procedures should still be followed when designing the
oscillator circuit.
In addition to dV/dt induced noise considerations, it is
also important to ensure that the circuit board is clean.
Even a very small amount of conductive soldering flux
residue can cause PCB leakage currents which can
overwhelm the oscillator circuit.
13.6 Timer1 Interrupt
The TMR1 register pair (TMR1H:TMR1L) increments
from 0000h to FFFFh and rolls over to 0000h. The
Timer1 interrupt, if enabled, is generated on overflow
which is latched in interrupt flag bit, TMR1IF
(PIR1<0>). This interrupt can be enabled or disabled
by setting or clearing the Timer1 Interrupt Enable bit,
TMR1IE (PIE1<0>).
DS39931D-page 206
 2011 Microchip Technology Inc.