PIC18F44J50-I Datasheet, PDF(72/562 Page) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

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PIC18F44J50-I Datasheet, PDF (72/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

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PIC18F46J50 FAMILY

TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable Devices

Power-on Reset,

Brown-out Reset,

Wake From Deep

Sleep

MCLR Resets

WDT Reset

RESET Instruction

Stack Resets

CM Resets

Wake-up via WDT

or Interrupt

IPR1

PIC18F2XJ50 PIC18F4XJ50

1111 1111

1111 1111

uuuu uuuu

PIR1

PIC18F2XJ50 PIC18F4XJ50

0000 0000

0000 0000

uuuu uuuu(3)

PIE1

PIC18F2XJ50 PIC18F4XJ50

0000 0000

0000 0000

uuuu uuuu

RCSTA2

PIC18F2XJ50 PIC18F4XJ50

0000 000x

0000 000x

uuuu uuuu

OSCTUNE

PIC18F2XJ50 PIC18F4XJ50

0000 0000

0000 0000

uuuu uuuu

T1GCON

PIC18F2XJ50 PIC18F4XJ50

0000 0x00

0000 0x00

uuuu uxuu

RTCVALH

PIC18F2XJ50 PIC18F4XJ50

0xxx xxxx

0uuu uuuu

0uuu uuuu

RTCVALL

PIC18F2XJ50 PIC18F4XJ50

0xxx xxxx

0uuu uuuu

0uuu uuuu

T3GCON

PIC18F2XJ50 PIC18F4XJ50

0000 0x00

uuuu uxuu

uuuu uxuu

TRISE(5)

â

PIC18F4XJ50

---- -111

---- -111

---- -uuu

TRISD(5)

â

PIC18F4XJ50

1111 1111

1111 1111

uuuu uuuu

TRISC

PIC18F2XJ50 PIC18F4XJ50

11-- -111

11-- -111

uu-- -uuu

TRISB

PIC18F2XJ50 PIC18F4XJ50

1111 1111

1111 1111

uuuu uuuu

TRISA

PIC18F2XJ50 PIC18F4XJ50

111- 1111

111- 1111

uuu- uuuu

ALRMCFG

PIC18F2XJ50 PIC18F4XJ50

0000 0000

uuuu uuuu

uuuu uuuu

ALRMRPT

PIC18F2XJ50 PIC18F4XJ50

0000 0000

uuuu uuuu

uuuu uuuu

ALRMVALH PIC18F2XJ50 PIC18F4XJ50

xxxx xxxx

uuuu uuuu

uuuu uuuu

ALRMVALL

PIC18F2XJ50 PIC18F4XJ50

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATE(5)

â

PIC18F4XJ50

---- -xxx

---- -uuu

---- -uuu

LATD(5)

â

PIC18F4XJ50

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATC

PIC18F2XJ50 PIC18F4XJ50

xx-- -xxx

uu-- -uuu

uu-- -uuu

LATB

PIC18F2XJ50 PIC18F4XJ50

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATA

PIC18F2XJ50 PIC18F4XJ50

xxx- xxxx

uuu- uuuu

uuu- uuuu

DMACON1

PIC18F2XJ50 PIC18F4XJ50

0000 0000

0000 0000

uuuu uuuu

DMACON2

PIC18F2XJ50 PIC18F4XJ50

0000 0000

0000 0000

uuuu uuuu

HLVDCON

PIC18F2XJ50 PIC18F4XJ50

0000 0000

0000 0000

uuuu uuuu

PORTE(5)

â

PIC18F4XJ50

00-- -xxx

uu-- -uuu

uu-- -uuu

PORTD(5)

â

PIC18F4XJ50

xxxx xxxx

uuuu uuuu

uuuu uuuu

PORTC

PIC18F2XJ50 PIC18F4XJ50

xxxx -xxx

uuuu -uuu

uuuu -uuu

PORTB

PIC18F2XJ50 PIC18F4XJ50

xxxx xxxx

uuuu uuuu

uuuu uuuu

PORTA

PIC18F2XJ50 PIC18F4XJ50

xxx- xxxx

uuu- uuuu

uuu- uuuu

SPBRGH1

PIC18F2XJ50 PIC18F4XJ50

0000 0000

0000 0000

uuuu uuuu

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Note 1: When the wake-up is due to an interrupt and the GIEH (and GIEL if low priority) bit(s) are set, the TOSU,

TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the

next location in the hardware stack.

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

4: See Table 5-1 for Reset value for specific condition.

5: Not implemented on PIC18F2XJ50 devices.

6: Not implemented on âLFâ devices.

DS39931D-page 72

ï£ 2011 Microchip Technology Inc.

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