PIC18F44J50-I Datasheet, PDF (424/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
REGISTER 27-6: CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
U-1
—
bit 7
U-1
U-1
U-1
R/WO-1
U-0
—
—
—
MSSPMSK
—
U-0
R/WO-1
—
IOL1WAY
bit 0
Legend:
R = Readable bit
-n = Value at POR
WO = Write-Once bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-4
bit 3
bit 2-1
bit 0
Unimplemented: Program the corresponding Flash Configuration bit to ‘1’
MSSPMSK: MSSP 7-Bit Address Masking Mode Enable bit
1 = 7-Bit Address Masking mode is enabled
0 = 5-Bit Address Masking mode is enabled
Unimplemented: Read as ‘0’
IOL1WAY: IOLOCK One-Way Set Enable bit
1 = IOLOCK bit (PPSCON<0>) can be set once, provided the unlock sequence has been completed.
Once set, the Peripheral Pin Select registers cannot be written to a second time.
0 = IOLOCK bit (PPSCON<0>) can be set and cleared as needed, provided the unlock sequence has
been completed
REGISTER 27-7: CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
R/WO-1
WPCFG
bit 7
R/WO-1
WPEND
R/WO-1
WPFP5⁽²⁾
R/WO-1
WPFP4⁽³⁾
R/WO-1
WPFP3
R/WO-1
WPFP2
R/WO-1
WPFP1
R/WO-1
WPFP0
bit 0
Legend:
R = Readable bit
-n = Value at POR
WO = Write-Once bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-0
WPCFG: Write/Erase Protect Configuration Region Select bit
1 = Configuration Words page is not erase/write-protected unless WPEND and WPFP<5:0> settings
include the Configuration Words page (and WPDIS = 0)⁽¹⁾
0 = Configuration Words page is erase/write-protected, regardless of WPDIS, WPEND and
WPFP<5:0>⁽¹⁾
WPEND: Write/Erase Protect Region Select bit (valid when WPDIS = 0)
1 = Flash pages, WPFP<5:0> to Configuration Words page, are erase/write-protected
0 = Flash pages, 0 to WPFP<5:0>, are erase/write-protected
WPFP<5:0>: Write/Erase Protect Page Start/End Location bits
Used with WPEND bit to define which pages in Flash will be erase/write-protected.
Note 1:
2:
3:
The “Configuration Words page” contains the FCWs and is the last page of implemented Flash memory on
a given device. Each page consists of 1,024 bytes. For example, on a device with 64 Kbytes of Flash, the
first page is 0 and the last page (Configuration Words page) is 63 (3Fh).
Implemented in 64-Kbyte devices (PIC18FX6J50). This bit is reserved on 32-Kbyte and 16-Kbyte devices
(PIC18FX5J50 and PIC18FX4J50) and should always be programmed to ‘0’ for proper operation on these
devices.
Implemented in 64-Kbyte and 32-Kbyte devices. This bit is reserved on 16-Kbyte devices (PIC18FX4J50)
and should always be programmed to ‘0’ for proper operation on these devices.
DS39931D-page 424
 2011 Microchip Technology Inc.