PIC18F44J50-I Datasheet, PDF (75/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset,
Wake From Deep
Sleep
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
UADDR
PIC18F2XJ50 PIC18F4XJ50
-000 0000
-uuu uuuu
-uuu uuuu
UEIE
PIC18F2XJ50 PIC18F4XJ50
0--0 0000
0--0 0000
u--u uuuu
UIE
PIC18F2XJ50 PIC18F4XJ50
-000 0000
-000 0000
-uuu uuuu
UEP15
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP14
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP13
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP12
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP11
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP10
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP9
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP8
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP7
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP6
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP5
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP4
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP3
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP2
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP1
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
UEP0
PIC18F2XJ50 PIC18F4XJ50
---0 0000
---0 0000
---u uuuu
PPSCON
PIC18F2XJ50 PIC18F4XJ50
---- ---0
---- ---0
---- ---u
RPINR24
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR23
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR22
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR21
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR17
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR16
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR13
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR12
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR8
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR7
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR6
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
RPINR4
PIC18F2XJ50 PIC18F4XJ50
---1 1111
---1 1111
---u uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1: When the wake-up is due to an interrupt and the GIEH (and GIEL if low priority) bit(s) are set, the TOSU,
TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the
next location in the hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.
5: Not implemented on PIC18F2XJ50 devices.
6: Not implemented on “LF” devices.
 2011 Microchip Technology Inc.
DS39931D-page 75