PIC18F44J50-I Datasheet, PDF (430/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
FIGURE 27-2:
CONNECTIONS FOR THE
ON-CHIP REGULATOR
PIC18FXXJ50 Devices (Regulator Enabled):
3.3V
PIC18FXXJ50
VDD
VDDCORE/VCAP
CF
VSS
PIC18LFXXJ50 Devices (Regulator Disabled):
2.5V
PIC18LFXXJ50
VDD
VDDCORE/VCAP
VSS
Or
2.5V
3.3V
PIC18LFXXJ50
VDD
VDDCORE/VCAP
VSS
27.3.2 ON-CHIP REGULATOR AND BOR
When the on-chip regulator is enabled, PIC18F46J50
family devices also have a simple brown-out capability.
If the voltage supplied to the regulator is inadequate to
maintain a minimum output level; the regulator Reset
circuitry will generate a Brown-out Reset (BOR). This
event is captured by the BOR flag bit (RCON<0>).
The operation of the BOR is described in more detail in
Section 5.4 “Brown-out Reset (BOR)” and
Section 5.4.1 “Detecting BOR”. The brown-out voltage
levels are specific in Section 30.1 “DC Characteristics:
Supply Voltage PIC18F46J50 Family (Industrial)”.
27.3.3 POWER-UP REQUIREMENTS
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, VDDCORE should not
exceed VDD by 0.3 volts.
27.3.4 OPERATION IN SLEEP MODE
When enabled, the on-chip regulator always consumes
a small incremental amount of current over IDD. This
includes when the device is in Sleep mode, even
though the core digital logic does not require much
power. To provide additional savings in applications
where power resources are critical, the regulator can
be configured to automatically enter a lower quiescent
draw Standby mode whenever the device goes into
Sleep mode. This feature is controlled by the REGSLP
bit (WDTCON<7>, Register 27-11). If this bit is set
upon entry into Sleep mode, the regulator will transition
into a lower power state. In this state, the regulator still
provides a regulated output voltage necessary to
maintain SRAM state information, but consumes less
quiescent current.
Substantial Sleep mode power savings can be
obtained by setting the REGSLP bit, but device
wake-up time will increase in order to insure the
regulator has enough time to stabilize.
DS39931D-page 430
 2011 Microchip Technology Inc.