PIC18F44J50-I Datasheet, PDF (428/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
REGISTER 27-11: WDTCON: WATCHDOG TIMER CONTROL REGISTER (ACCESS FC0h)
R/W-1
R-x
R-x
U-0
R-q
R/W-0
R/W-0
R/W-0
REGSLP LVDSTAT⁽²⁾ ULPLVL
—
DS
ULPEN
ULPSINK SWDTEN⁽¹⁾
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’ q = Depends on condition
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
REGSLP: Voltage Regulator Low-Power Operation Enable bit
1 = On-chip regulator enters low-power operation when device enters Sleep mode
0 = On-chip regulator is active even in Sleep mode
bit 6
LVDSTAT: Low-Voltage Detect Status bit⁽²⁾
1 = VDDCORE > 2.45V nominal
0 = VDDCORE < 2.45V nominal
bit 5
ULPLVL: Ultra Low-Power Wake-up Output bit (not valid unless ULPEN = 1)
1 = Voltage on RA0 > ~0.5V
0 = Voltage on RA0 < ~0.5V
bit 4
Unimplemented: Read as ‘0’
bit 3
DS: Deep Sleep Wake-up Status bit (used in conjunction with RCON, POR and BOR bits to determine
Reset source)⁽²⁾
1 = If the last exit from Reset was caused by a normal wake-up from Deep Sleep
0 = If the last exit from Reset was not due to a wake-up from Deep Sleep
bit 2
ULPEN: Ultra Low-Power Wake-up Module Enable bit
1 = Ultra Low-Power Wake-up module is enabled; ULPLVL bit indicates the comparator output
0 = Ultra Low-Power Wake-up module is disabled
bit 1
ULPSINK: Ultra Low-Power Wake-up Current Sink Enable bit
1 = Ultra Low-Power Wake-up current sink is enabled
0 = Ultra Low-Power Wake-up current sink is disabled
bit 0
SWDTEN: Software Controlled Watchdog Timer Enable bit⁽¹⁾
1 = Watchdog Timer is on
0 = Watchdog Timer is off
Note 1: This bit has no effect if the Configuration bit, WDTEN, is enabled.
2: Not available on devices where the on-chip voltage regulator is disabled (“LF” devices).
TABLE 27-3: SUMMARY OF WATCHDOG TIMER REGISTERS
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset Values
on Page:
RCON
IPEN
—
CM
RI
TO
PD
POR
BOR
70
WDTCON REGSLP LVDSTAT ULPLVL
—
DS ULPEN ULPSINK SWDTEN
70
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
DS39931D-page 428
 2011 Microchip Technology Inc.