PIC18F44J50-I Datasheet, PDF (517/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
FIGURE 30-10: PARALLEL MASTER PORT READ TIMING DIAGRAM
System
Clock
PMA<13:18>
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Address
PMD<7:0>
PMRD
PMWR
PMALL/PMALH
PMCS
Address<7:0>
PM2
PM3
PM1
Data
PM6
PM7
PM5
Operating Conditions: 2.0V < VDD < 3.6V, -40°C < TA < +85°C unless otherwise stated.
TABLE 30-18: PARALLEL MASTER PORT READ TIMING REQUIREMENTS
Param.
No
Symbol
Characteristics
Min
Typ
PM1
PM2
PM3
PM5
PM6
PM7
PMALL/PMALH Pulse Width
—
Address Out Valid to PMALL/PMALH
—
Invalid (address setup time)
PMALL/PMALH Invalid to Address Out
—
Invalid (address hold time)
PMRD Pulse Width
—
Data in Valid to PMRD or PMENB Invalid
—
(data setup time)
PMRD or PMENB Inactive to Data In Invalid
—
(data hold time)
0.5 TCY
0.75 TCY
0.25 TCY
0.5 TCY
—
—
Max
Units
—
ns
—
ns
—
ns
—
ns
—
ns
5
ns
 2011 Microchip Technology Inc.
DS39931D-page 517