PIC18F44J50-I Datasheet, PDF (181/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
11.2.5
ADDRESSABLE PARALLEL SLAVE
PORT MODE
In the Addressable Parallel Slave Port mode
(PMMODEH<1:0> = 01), the module is configured with
two extra inputs, PMA<1:0>, which are the Address
Lines 1 and 0. This makes the 4-byte buffer space
directly addressable as fixed pairs of read and write
buffers. As with Legacy Buffered mode, data is output
from PMDOUT1L, PMDOUT1H, PMDOUT2L and
PMDOUT2H, and is read in PMDIN1L, PMDIN1H,
PMDIN2L and PMDIN2H. Table 11-1 provides the
buffer addressing for the incoming address to the input
and output registers.
TABLE 11-1:
PMA<1:0>
00
01
10
11
SLAVE MODE BUFFER
ADDRESSING
Output
Register
(Buffer)
PMDOUT1L (0)
PMDOUT1H (1)
PMDOUT2L (2)
PMDOUT2H((3)
Input Register
(Buffer)
PMDIN1L (0)
PMDIN1H (1)
PMDIN2L (2)
PMDIN2H (3)
FIGURE 11-6:
PARALLEL MASTER/SLAVE CONNECTION ADDRESSED BUFFER EXAMPLE
PIC18F Master
PMA<1:0>
PMD<7:0>
PMA<1:0>
PIC18F Slave
PMD<7:0>
Write
Address
Decode
Read
Address
Decode
PMCS
PMRD
PMWR
Address Bus
Data Bus
Control Lines
PMCS
PMRD
PMWR
PMDOUT1L (0)
PMDOUT1H (1)
PMDOUT2L (2)
PMDOUT2H (3)
PMDIN1L (0)
PMDIN1H (1)
PMDIN2L (2)
PMDIN2H (3)
11.2.5.1 READ FROM SLAVE PORT
When chip select is active and a read strobe occurs
(PMCS = 1 and PMRD = 1), the data from one of the
four output bytes is presented onto PMD<7:0>. Which
byte is read depends on the 2-bit address placed on
ADDR<1:0>. Table 11-1 provides the corresponding
output registers and their associated address. When an
output buffer is read, the corresponding OBxE bit is set.
The OBxE flag bit is set when all the buffers are empty.
If any buffer is already empty, OBxE = 1, the next read
to that buffer will generate an OBUF event.
FIGURE 11-7:
PARALLEL SLAVE PORT READ WAVEFORMS
| Q4 | Q1 | Q2 | Q3 | Q4
PMCS
PMWR
PMRD
PMD<7:0>
PMA<1:0>
OBE
PMPIF
 2011 Microchip Technology Inc.
DS39931D-page 181