PIC18F44J50-I Datasheet, PDF (216/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
15.2 Timer3 Operation
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
• Timer with Gated Control
The operating mode is determined by the clock select
bits, TMR3CSx (T3CON<7:6>). When the TMR3CSx bits
are cleared (= 00), Timer3 increments on every internal
instruction cycle (FOSC/4). When TMR3CSx = 01, the
Timer3 clock source is the system clock (FOSC), and
when it is ‘10’, Timer3 works as a counter from the
external clock from the T3CKI pin (on the rising edge
after the first falling edge) or the Timer1 oscillator.
FIGURE 15-1:
TIMER3 BLOCK DIAGRAM
T3GSS<1:0>
T3G
00
T3GSPM
From Timer0
Overflow
From Timer2
Match PR2
01
10
T3GPOL
Set flag bit
TMR1IF on
Overflow
T3G_IN
TMR3ON
T3GTM
DQ
CK ^Q
R
0
Single Pulse
1
Acq. Control
T3GGO/T3DONE
0
T3GVAL _{D Q}
1
Q1 EN
Interrupt
det
TMR3ON
TMR3GE
TMR3⁽²⁾
TMR3H
TMR3L
EN
QD
TMR3CS<1:0>
T3CLK
0
1
T3SYNC
Synchronized
Clock Input
Data Bus
RD
T3GCON
Set
TMR3GIF
T3CKI⁽¹⁾ or
T1OSC⁽⁴⁾
10
Prescaler
1, 2, 4, 8
Synchronize⁽³⁾
det
2
FOSC
T3CKPS<1:0>
Internal ⁰¹
Clock
FOSC/2
FOSC/4
Internal ⁰⁰
Internal
Clock
Clock
Sleep Input
Note 1:
2:
3:
4:
ST buffer is a high-speed type when using T3CKI.
Timer3 register increments on the rising edge.
Synchronization does not operate while in Sleep.
If T3OSCEN = 1, the clock is from the Timer1 crystal output. If T3OSCEN = 0, the clock is from the
T3CKI digital input pin assigned in the PPS module.
DS39931D-page 216
 2011 Microchip Technology Inc.