PIC18F44J50-I Datasheet, PDF (275/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
19.3.6 MASTER MODE
The master can initiate the data transfer at any time
because it controls the SCKx. The master determines
when the slave (Processor 2, Figure 19-2) is to
broadcast data by the software protocol.
In Master mode, the data is transmitted/received as
soon as the SSPxBUF register is written to. If the SPI
is only going to receive, the SDOx output could be dis-
abled (programmed as an input). The SSPxSR register
will continue to shift in the signal present on the SDIx
pin at the programmed clock rate. As each byte is
received, it will be loaded into the SSPxBUF register as
if a normal received byte (interrupts and status bits
appropriately set). This could be useful in receiver
applications as a “Line Activity Monitor” mode.
Note:
To avoid lost data in Master mode, a read
of the SSPxBUF must be performed to
clear the Buffer Full (BF) detect bit
(SSPxSTAT<0>) between each
transmission.
The CKP is selected by appropriately programming the
CKP bit (SSPxCON1<4>). This then, would give
waveforms for SPI communication as illustrated in
Figure 19-3, Figure 19-5 and Figure 19-6, where the
Most Significant Byte (MSB) is transmitted first. In
Master mode, the SPI clock rate (bit rate) is
user-programmable to be one of the following:
• FOSC/4 (or TCY)
• FOSC/16 (or 4 • TCY)
• FOSC/64 (or 16 • TCY)
• Timer2 output/2
When using the Timer2 output/2 option, the Period
Register 2 (PR2) can be used to determine the SPI bit
rate. However, only PR2 values of 0x01 to 0xFF are
valid in this mode.
Figure 19-3 illustrates the waveforms for Master mode.
When the CKE bit is set, the SDOx data is valid before
there is a clock edge on SCKx. The change of the input
sample is shown based on the state of the SMP bit. The
time when the SSPxBUF is loaded with the received
data is shown.
FIGURE 19-3:
Write to
SSPxBUF
SCKx
(CKP = 0
CKE = 0)
SCKx
(CKP = 1
CKE = 0)
SCKx
(CKP = 0
CKE = 1)
SCKx
(CKP = 1
CKE = 1)
SDOx
(CKE = 0)
SDOx
(CKE = 1)
SDIx
(SMP = 0)
Input
Sample
(SMP = 0)
SDIx
(SMP = 1)
Input
Sample
(SMP = 1)
SSPxIF
SSPxSR to
SSPxBUF
SPI MODE WAVEFORM (MASTER MODE)
4 Clock
Modes
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 7
bit 0
bit 7
bit 0
Next Q4 Cycle
after Q2
 2011 Microchip Technology Inc.
DS39931D-page 275