PIC18F44J50-I Datasheet, PDF (310/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
19.5.7.1 Baud Rate and Module
Interdependence
Because MSSP1 and MSSP2 are independent, they
can operate simultaneously in I²C Master mode at
different baud rates. This is done by using different
BRG reload values for each module.
Because this mode derives its basic clock source from
the system clock, any changes to the clock will affect
both modules in the same proportion. It may be
possible to change one or both baud rates back to a
previous value by changing the BRG reload value.
FIGURE 19-19:
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM<3:0>
SSPxADD<6:0>
SSPM<3:0>
SCLx
Reload
Control
Reload
CLKO
BRG Down Counter
FOSC/4
TABLE 19-3: I²C™ CLOCK RATE w/BRG
FOSC
FCY
FCY * 2
BRG Value
FSCL
(2 Rollovers of BRG)
48 MHz
12 MHz
24 MHz
77h
100 kHz
40 MHz
10 MHz
20 MHz
18h
400 kHz⁽¹⁾
40 MHz
16 MHz
16 MHz
10 MHz
4 MHz
4 MHz
20 MHz
8 MHz
8 MHz
63h
100 kHz
03h
1 MHz⁽¹⁾
09h
400 kHz⁽¹⁾
16 MHz
4 MHz
8 MHz
0Ch
308 kHz
16 MHz
4 MHz
4 MHz
1 MHz
8 MHz
2 MHz
27h
100 kHz
02h
333 kHz⁽¹⁾
4 MHz
1 MHz
2 MHz
09h
100 kHz
Note 1: The I²C interface does not conform to the 400 kHz I²C specification (which applies to rates greater than
100 kHz) in all details, but may be used with care where higher rates are required by the application.
DS39931D-page 310
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