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| PIC18F44J50-I Datasheet, PDF (15/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers | |||
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PIC18F46J50 FAMILY
FIGURE 1-2:
PIC18F4XJ50 (44-PIN) BLOCK DIAGRAM
Data Bus<8>
Table Pointer<21>
inc/dec logic
21 20
88
PCLATU PCLATH
PCU PCH PCL
Program Counter
Address Latch
Program Memory
(16 Kbytes-64 Kbytes)
Data Latch
31-Level Stack
STKPTR
8
Table Latch
Data Latch
Data Memory
(3.8 Kbytes)
Address Latch
12
Data Address<12>
4
12
4
BSR
FSR0
FSR1
Access
Bank
FSR2
12
inc/dec
logic
Instruction Bus <16>
AD<15:0>, A<19:16>
(Multiplexed with PORTD
and PORTE)
ROM Latch
IR
State Machine
Control Signals
Instruction
Decode and
Control
OSC2/CLKO
OSC1/CLKI
VUSB
Timing
Generation
8 MHz
INTOSC
INTRC
Oscillator
USB
Module
Precision
Band Gap
Reference
Voltage
Regulator
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset(2)
Address
Decode
8
PRODH PRODL
3
BITOP
8
8 x 8 Multiply
8
W
8
8
8
8
ALU<8>
8
RTCC
HLVD
VDDCORE/VCAP VDD,VSS
MCLR
ADC
10-Bit
Timer0
Timer1
Timer2
Timer3
Timer4
Comparators
PORTA
RA0:RA7(1)
PORTB
RB0:RB7(1)
PORTC
RC0:RC7(1)
PORTD
RD0:RD7(1)
PORTE
RE0:RE2(1)
PMP
CTMU
ECCP1
ECCP2
EUSART1
EUSART2
MSSP1
MSSP2
USB
Note 1: See Table 1-3 for I/O port pin descriptions.
2: The on-chip voltage regulator is always enabled by default.
ï£ 2011 Microchip Technology Inc.
DS39931D-page 15
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