PIC18F44J50-I Datasheet, PDF (128/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
REGISTER 9-12: IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3 (ACCESS FA5h)
R/W-1
SSP2IP
bit 7
R/W-1
BCL2IP
R/W-1
RC2IP
R/W-1
TX2IP
R/W-1
TMR4IP
R/W-1
CTMUIP
R/W-1
TMR3GIP
R/W-1
RTCCIP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
SSP2IP: Master Synchronous Serial Port 2 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 6
BCL2IP: Bus Collision Interrupt Priority bit (MSSP2 module)
1 = High priority
0 = Low priority
bit 5
RC2IP: EUSART2 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
bit 4
TX2IP: EUSART2 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3
TMR4IE: TMR4 to PR4 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 2
CTMUIP: Charge Time Measurement Unit (CTMU) Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
TMR3GIP: Timer3 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0
RTCCIP: RTCC Interrupt Priority bit
1 = High priority
0 = Low priority
DS39931D-page 128
 2011 Microchip Technology Inc.