PIC18F44J50-I Datasheet, PDF (291/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
REGISTER 19-7: SSPxCON2: MSSPx CONTROL REGISTER 2 (I²C™ MASTER MODE)
(ACCESS FC5h, F71h)
R/W-0
GCEN⁽³⁾
bit 7
R-0
ACKSTAT
R/W-0
ACKDT⁽¹⁾
R/W-0
ACKEN⁽²⁾
R/W-0
RCEN⁽²⁾
R/W-0
PEN⁽²⁾
R/W-0
RSEN⁽²⁾
R/W-0
SEN⁽²⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
GCEN: General Call Enable bit (Slave mode only)⁽³⁾
1 = Enable interrupt when a general call address (0000h) is received in the SSPxSR
0 = General call address is disabled
bit 6
ACKSTAT: Acknowledge Status bit (Master Transmit mode only)
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
bit 5
ACKDT: Acknowledge Data bit (Master Receive mode only)⁽¹⁾
1 = Not Acknowledged
0 = Acknowledge
bit 4
ACKEN: Acknowledge Sequence Enable bit⁽²⁾
1 = Initiates Acknowledge sequence on SDAx and SCLx pins and transmits ACKDT data bit;
automatically cleared by hardware
0 = Acknowledge sequence is Idle
bit 3
RCEN: Receive Enable bit (Master Receive mode only)⁽²⁾
1 = Enables Receive mode for I²C
0 = Receive is Idle
bit 2
PEN: Stop Condition Enable bit⁽²⁾
1 = Initiates Stop condition on SDAx and SCLx pins; automatically cleared by hardware
0 = Stop condition is Idle
bit 1
RSEN: Repeated Start Condition Enable bit⁽²⁾
1 = Initiates Repeated Start condition on SDAx and SCLx pins; automatically cleared by hardware
0 = Repeated Start condition is Idle
bit 0
SEN: Start Condition Enable bit⁽²⁾
1 = Initiates Start condition on SDAx and SCLx pins; automatically cleared by hardware
0 = Start condition is Idle
Note 1:
2:
3:
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of a receive.
If the I²C module is active, these bits may not be set (no spooling) and the SSPxBUF may not be written
(or writes to the SSPxBUF are disabled).
This bit is not implemented in I²C Master mode.
 2011 Microchip Technology Inc.
DS39931D-page 291