PIC18F44J50-I Datasheet, PDF (36/562 Pages) Microchip Technology – 28/44-Pin, Low-Power, High-Performance USB Microcontrollers

PIC18F46J50 FAMILY
3.2.1
OSCILLATOR MODES AND
USB OPERATION
Because of the unique requirements of the USB module,
a different approach to clock operation is necessary. In
order to use the USB module, a fixed 6 MHz or 48 MHz
clock must be internally provided to the USB module for
operation in either Low-Speed or Full-Speed mode,
respectively. The microcontroller core need not be
clocked at the same frequency as the USB module.
A network of MUXes, clock dividers and a fixed 96 MHz
output PLL have been provided, which can be used to
derive various microcontroller core and USB module
frequencies. Figure 3-1 helps in understanding the
oscillator structure of the PIC18F46J50 family of
devices.
FIGURE 3-1:
PIC18F46J50 FAMILY CLOCK DIAGRAM
PLLDIV<2:0>
OSC2
Primary Oscillator
OSC1
FOSC2
1
0
 12
 10
6
5
4
3
2
1
000
001
010
011
100
101
110
111
4 MHz 96 MHz
PLL⁽¹⁾
 2 ^{48 MHz}
FSEN
1
0
PLLEN
(Note 2)
CPDIV<1:0>
 6 ₀₀
 3 ₀₁
 2 ₁₀
 1 ₁₁
FOSC<2:1>
1
USB Module
Clock
 8 ¹⁰
Needs 48 MHz for FS
Needs 6 MHz for LS
0
 4 ¹¹
CPDIV<1:0>
T1OSO
T1OSI
Secondary Oscillator
T1OSCEN
Internal
Oscillator
Block
8 MHz
INTRC
31 kHz
8 MHz
OSCCON<6:4>
8 MHz
4 MHz ¹¹¹
110
2 MHz
101
1 MHz
100
500 kHz
011
250 kHz
010
125 kHz
001
1 31 kHz
000
0
OSCTUNE<7>
Primary Clock
Source⁽⁴⁾
IDLE
00
CPU
00
Timer1 Clock⁽³⁾
01
Peripherals
Postscaled
11
Internal Clock
4
OSCCON<1:0> _CLKO
Enabled Modes
RA6
WDT, PWRT, FSCM
and Two-Speed Start-up
Note 1: The PLL requires a 4 MHz input and it produces a 96 MHz output. The PLL will not be available until the PLLEN bit in
the OSCTUNE register is set. Once the PLLEN bit is set, the PLL requires up to t_rc to lock. During this time, the
device continues to be clocked at the PLL bypassed frequency.
2: In order to use the USB module in Full-Speed mode, this node must be run at 48 MHz. For Low-Speed mode, this node
may be run at either 48 MHz or 24 MHz, but the CPDIV bits must be set such that the USB module is clocked at 6 MHz.
3: Selecting the Timer1 clock or postscaled internal clock will turn off the primary oscillator (unless required by the
reference clock described in Section 3.6 “Reference Clock Output”) and the PLL.
4: The USB module cannot be used to communicate unless the primary clock source is selected.
DS39931D-page 36
 2011 Microchip Technology Inc.