MC68HC08XL36 Datasheet, PDF (98/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

CGM
Freescale Semiconductor, Inc.
XLD — Crystal Loss Detect Bit
When the VCO output, CGMVCLK, is driving CGMOUT, this
read/write bit can indicate whether the crystal reference frequency is
active or not.
1 = Crystal reference not active
0 = Crystal reference active
To check the status of the crystal reference, do the following:
1. Write a logic 1 to XLD.
2. Wait N × 4 cycles. (N is the VCO frequency multiplier.)
3. Read XLD.
The crystal loss detect function works only when the BCS bit is set,
selecting CGMVCLK to drive CGMOUT. When BCS is clear, XLD
always reads as logic 0.
Bits 3–0 — Reserved for Test
These bits enable test functions not available in user mode. To
ensure software portability from development systems to user
applications, software should write 0s to bits 3–0 whenever writing to
PBWC.
PLL Programming
Register
The PLL programming register contains the programming information
for the modulo feedback divider and the programming information for the
hardware configuration of the VCO.
Address: $001E
Bit 7
6
5
4
3
2
1
Read:
MUL7
Write:
MUL6
MUL5
MUL4
VRS7
VRS6
VRS5
Reset: 0
1
1
0
0
1
1
Figure 6. PLL Programming Register (PPG)
Bit 0
VRS4
0
MC68HC08XL36
98
Clock Generator Module (CGM)
For More Information On This Product,
Go to: www.freescale.com
18-cgm1m_a
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