MC68HC08XL36 Datasheet, PDF (212/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
SPI
The error interrupt enable bit (ERRIE) enables both the MODF and
OVRF bits to generate a receiver/error CPU interrupt request.
The mode fault enable bit (MODFEN) can prevent the MODF flag from
being set so that only the OVRF bit is enabled by the ERRIE bit to
generate receiver/error CPU interrupt requests.
DMAS
ERRIE
MODF
OVRF
SPTE SPTIE SPE
SPRIE SPRF
SPI TRANSMITTER
DMA SERVICE REQUEST
SPI TRANSMITTER
CPU INTERRUPT REQUEST
SPI RECEIVER
DMA SERVICE REQUEST
SPI RECEIVER/ERROR
CPU INTERRUPT REQUEST
Figure 12. SPI Interrupt Request Generation
MC68HC08XL36
212
Serial Peripheral Interface Module (SPI)
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22-spi_c
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