MC68HC08XL36 Datasheet, PDF (173/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Timer Interface Module (TIM)
Functional Description
Buffered PWM
Signal Generation
Channels 0 and 1 can be linked to form a buffered PWM channel whose
output appears on the TCH0 pin. The TIM channel registers of the linked
pair alternately control the pulse width of the output.
Setting the MS0B bit in TIM channel 0 status and control register (TSC0)
links channel 0 and channel 1. The TIM channel 0 registers initially
control the pulse width on the TCH0 pin. Writing to the TIM channel 1
registers enables the TIM channel 1 registers to synchronously control
the pulse width at the beginning of the next PWM period. At each
subsequent overflow, the TIM channel registers (0 or 1) that control the
pulse width are the ones written to last. TSC0 controls and monitors the
buffered PWM function, and TIM channel 1 status and control register
(TSC1) is unused. While the MS0B bit is set, the channel 1 pin, TCH1,
is available as a general-purpose I/O pin.
Channels 2 and 3 can be linked to form a buffered PWM channel whose
output appears on the TCH2 pin. The TIM channel registers of the linked
pair alternately control the pulse width of the output.
Setting the MS2B bit in TIM channel 2 status and control register (TSC2)
links channel 2 and channel 3. The TIM channel 2 registers initially
control the pulse width on the TCH2 pin. Writing to the TIM channel 3
registers enables the TIM channel 3 registers to synchronously control
the pulse width at the beginning of the next PWM period. At each
subsequent overflow, the TIM channel registers (2 or 3) that control the
pulse width are the ones written to last. TSC2 controls and monitors the
buffered PWM function, and TIM channel 3 status and control register
(TSC3) is unused. While the MS2B bit is set, the channel 3 pin, TCH3,
is available as a general-purpose I/O pin.
NOTE:
In buffered PWM signal generation, do not write new pulse width values
to the currently active channel registers. Writing to the active channel
registers is the same as generating unbuffered PWM signals.
11-tim4_b
MOTOROLA
Timer Interface Module (TIM)
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MC68HC08XL36
173