MC68HC08XL36 Datasheet, PDF (126/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

DMA
Freescale Semiconductor, Inc.
Low-Power Modes
The WAIT and STOP instructions put the MCU in low-power-consump-
tion standby modes.
Wait Mode
If enabled by the DMAWE bit in the DMA status and control register, the
DMA remains active in wait mode. The DMA can transfer data to and
from peripherals while the MCU remains in wait mode.
If the WAIT instruction occurs during a DMA transfer while DMAWE is
set, the DMA transfer continues to completion. If the DMAWE bit is clear,
a WAIT instruction suspends the current DMA transfer. If the DMA
priority bit (DMAP) is set, the suspended transfer resumes when the
MCU exits wait mode.
Stop Mode
The DMA is inactive during stop mode. A STOP instruction suspends
any DMA transfer in progress. If an external interrupt brings the MCU out
of stop mode and the DMA priority bit (DMAP) is set, the suspended
DMA transfer resumes. If a reset brings the MCU out of stop mode, the
transfer is aborted.
Entering stop mode when a DMA channel is enabled may fail to clear the
the interrupt mask (I bit) in the condition code register. To make sure the
I bit is cleared when entering stop mode:
• Before executing the STOP instruction, wait until any current DMA
transfer is complete. Then disable DMA transfers by clearing bits
TEC2–TEC0 in DMA control register 1.
Or,
• Execute the clear-interrupt-mask instruction (CLI) before entering
stop mode.
MC68HC08XL36
126
Direct Memory Access Module (DMA)
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20-dma_b
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