MC68HC08XL36 Datasheet, PDF (29/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Memory Map
Input/Output (I/O) Section
Register Name Addr.
PLL Control Register
(PCTL)
$001C
Read:
Write:
Reset:
PLL Bandwidth Control
Register (PBWC)
$001D
Read:
Write:
Reset:
PLL Programming
Register (PPG)
Read:
$001E Write:
Reset:
Bit 7
PLLIE
0
AUTO
0
MUL7
0
6
PLLF
0
LOCK
0
MUL6
1
5
PLLON
1
ACQ
0
MUL5
1
4
BCS
0
XLD
0
MUL4
0
3
1
1
0
0
VRS7
0
2
1
1
0
0
VRS6
1
1
1
1
0
0
VRS5
1
Bit 0
1
1
0
0
VRS4
0
$001F
Reserved
TIM Status and Control
Register (TSC)
Read:
$0020 Write:
Reset:
TIM DMA Select Register
(TDMA)
Read:
$0021 Write:
Reset:
TIM Counter Register
High (TCNTH)
Read:
$0022 Write:
Reset:
TIM Counter Register Low
(TCNTL)
Read:
$0023 Write:
Reset:
TIM Counter Modulo
Register High (TMODH)
Read:
$0024 Write:
Reset:
TIM Counter Modulo
Register Low (TMODL)
Read:
$0025 Write:
Reset:
TIM Channel 0 Status and
Control Register (TSC0)
Read:
$0026 Write:
Reset:
TIM Channel 0 Register
High (TCH0H)
Read:
$0027 Write:
Reset:
TIM Channel 0 Register
Low (TCH0L)
Read:
$0028 Write:
Reset:
TIM Channel 1 Status and
Control Register (TSC1)
Read:
$0029 Write:
Reset:
TOF
0
0
0
0
Bit 15
0
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
TOIE
TSTOP
0
TRST
0
PS2
PS1
PS0
0
1
0
0
0
0
0
0
0
0
DMA3S DMA2S DMA1S DMA0S
0
0
14
13
0
0
0
12
11
10
0
0
9
Bit 8
0
0
0
0
0
0
0
6
5
4
3
2
1
Bit 0
0
14
1
6
1
CH0IE
0
14
6
CH1IE
0
0
0
0
0
13
12
11
10
1
1
1
1
5
4
3
2
1
1
1
1
MS0B MS0A ELS0B ELS0A
0
0
0
0
13
12
11
10
Indeterminate after Reset
5
4
3
2
Indeterminate after Reset
0
MS1A ELS1B ELS1A
0
0
0
0
0
9
1
1
1
TOV0
0
9
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
1
Bit 0
TOV1 CH1MAX
0
0
= Unimplemented R = Reserved
Figure 2. I/O Register Summary (Continued)
7-mem_a
MOTOROLA
Memory Map
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MC68HC08XL36
29