MC68HC08XL36 Datasheet, PDF (327/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Control Timing
Freescale Semiconductor, Inc.
Specifications
Preliminary Electrical Specifications
Table 7. Control Timing (V_DD = 5.0 Vdc ± 10%)⁽¹⁾
Characteristic
Frequency of Operation⁽²⁾
Crystal Option
External Clock Option⁽³⁾
Symbol Min Max Unit
f_osc
1 8 MHz
dc⁽⁴⁾ 32.8 MHz
Internal Operating Frequency
f_op
— 8.2 MHz
RESET Input Pulse Width Low⁽⁵⁾
t_IRL
50 — ns
IRQ Interrupt Pulse Width Low⁽⁶⁾ (Edge-Triggered)
t_ILIH
50 — ns
1. V_SS = 0 Vdc; timing shown with respect to 20% V_DD and 70% V_DD unless noted
2. See Table 14 and Table 15 for more information.
3. No more than 10% duty cycle deviation from 50%
4. Some modules may require a minimum frequency greater than dc for proper operation;
see appropriate table for this information.
5. Minimum pulse width reset is guaranteed to be recognized; it is possible for a smaller pulse
width to cause a reset.
6. Minimum pulse width is for guaranteed interrupt; it is possible for a smaller pulse width to
be recognized.
Table 8. Control Timing (V_DD = 3.0 Vdc ± 10%)⁽¹⁾
Characteristic
Frequency of Operation⁽²⁾
Crystal Option
External Clock Option⁽³⁾
Symbol Min Max Unit
f_osc
1 8 MHz
dc⁽⁴⁾ 16.4 MHz
Internal Operating Frequency
f_op
— 4.1 MHz
RESET Input Pulse Width Low⁽⁵⁾
IRQ Interrupt Pulse Width Low⁽⁶⁾ (Edge-Triggered)
t_IRL 125 — ns
t_ILIH 125 — ns
1. V_SS = 0 Vdc; timing shown with respect to 20% V_DD and 70% V_DD unless noted
2. See Table 14 and Table 15 for more information.
3. No more than 10% duty cycle deviation from 50%
4. Some modules may require a minimum frequency greater than dc for proper operation;
see appropriate table for this information.
5. Minimum pulse width reset is guaranteed to be recognized; it is possible for a smaller pulse
width to cause a reset.
6. Minimum pulse width is for guaranteed interrupt; it is possible for a smaller pulse width to
be recognized.
7-spec_b
MOTOROLA
Specifications
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MC68HC08XL36
327