MC68HC08XL36 Datasheet, PDF (263/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Serial Communications Interface Module (SCI)
I/O Registers
NOTE: When DMATE = 1, a write by the CPU to the SCI data register can clear
the SCTE bit inadvertently and cause the DMA to miss a service request.
NOTE:
Setting the TE bit for the first time also sets the SCTE bit. When enabling
SCI transmitter DMA service requests, set the TE bit after setting the
DMATE bit. Otherwise setting the TE and SCTIE bits generates an SCI
transmitter CPU interrupt request instead of a DMA service request.
TC — Transmission Complete Bit
This read-only bit is set when the SCTE bit is set, and no data,
preamble, or break character is being transmitted. TC generates an
SCI transmitter CPU interrupt request if the TCIE bit in SCC2 is also
set. When the DMA services an SCI transmitter DMA service request,
the DMA clears the TC bit by writing to the SCDR. TC is cleared
automatically when data, preamble, or break is queued and ready to
be sent. There may be up to 1.5 transmitter clocks of latency between
queueing data, preamble, and break and the transmission actually
starting. Reset sets the TC bit.
1 = No transmission in progress
0 = Transmission in progress
SCRF — SCI Receiver Full Bit
This clearable, read-only bit is set when the data in the receive shift
register transfers to the SCI data register. SCRF can generate an SCI
receiver CPU interrupt request or an SCI receiver DMA service
request. When the SCRIE bit in SCC2 is set and the DMARE bit in
SCC3 is clear, SCRF generates a CPU interrupt request. With both
the SCRIE and DMARE bits set, SCRF generates a DMA service
request. In normal operation, clear the SCRF bit by reading SCS1
with SCRF set and then reading the SCDR. In DMA transfers, the
DMA clears the SCRF bit when it reads the SCDR. Reset clears
SCRF.
1 = Received data available in SCDR
0 = Data not available in SCDR
NOTE: When DMARE = 1, a read by the CPU of the SCI data register can clear
the SCRF bit inadvertently and cause the DMA to miss a service request.
37-sci_d
MOTOROLA
Serial Communications Interface Module (SCI)
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MC68HC08XL36
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