MC68HC08XL36 Datasheet, PDF (329/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Specifications
Preliminary Electrical Specifications
SPI Characteristics
Table 10. SPI Timing (V_DD = 5.0 Vdc ± 10%)⁽¹⁾
Diagram
Number⁽²⁾
Characteristic
Symbol
Min
Max
Unit
Operating Frequency
Master
Slave
f_op(m)
f_op(s)
fop/128
dc
f_op/2
f_op
MHz
MHz
Cycle Time
1
Master
Slave
2
Enable Lead Time
3
Enable Lag Time
t_cyc(m)
2
t_cyc(s)
1
t_Lead(s)
15
t_Lag(s)
15
128
t_cyc
—
t_cyc
ns
ns
Clock (SCK) High Time
4
Master
Slave
t_sckh(m)
100
—
ns
t_sckh(s)
50
—
ns
Clock (SCK) Low Time
5
Master
Slave
t_sckl(m)
100
—
ns
t_sckl(s)
50
—
ns
Data Setup Time (Inputs)
6
Master
Slave
t_su(m)
45
t_su(s)
5
—
—
ns
ns
Data Hold Time (Inputs)
7
Master
Slave
t_h(m)
0
—
ns
t_h(s)
15
—
ns
Access Time, Slave⁽³⁾
8
CPHA = 0
CHPA = 1
9
Disable Time, Slave⁽⁴⁾
t_a(cp0)
0
t_a(cp1)
0
t_dis(s)
—
40
ns
20
ns
25
ns
Data Valid Time (After Enable Edge)
10
Master
Slave⁽⁵⁾
t_v(m)
—
10
ns
t_v(s)
—
40
ns
Data Hold Time (Outputs, After Enable Edge)
11
Master
t_ho(m)
0
Slave
t_ho(s)
5
—
ns
—
ns
1. All timing is shown with respect to 20% V_DD and 70% V_DD, unless noted; assumes 100 pf load on all SPI pins
2. Numbers refer to dimensions in Figure 1 . SPI Master Timing and Figure 2 . SPI Slave Timing.
3. Time to data active from high-impedance state.
4. Hold time to high-impedance state.
5. With 100 pF on all SPI pins.
9-spec_b
MOTOROLA
Specifications
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MC68HC08XL36
329