MC68HC08XL36 Datasheet, PDF (82/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

CGM
Freescale Semiconductor, Inc.
CGM During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101
Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . . . . . . . . .102
Acquisition/Lock Time Definitions . . . . . . . . . . . . . . . . . . . . . . . . .102
Parametric Influences on Reaction Time . . . . . . . . . . . . . . . . . . .103
Choosing a Filter Capacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .104
Reaction Time Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
Introduction
The CGM generates the crystal clock signal, CGMXCLK, which operates
at the frequency of the crystal. The CGM also generates the base clock
signal, CGMOUT, from which the system clocks are derived. CGMOUT
is based on either the crystal clock divided by two or the phase-locked
loop (PLL) clock, CGMVCLK, divided by two. The PLL is a frequency
generator designed for use with 1-MHz to 16-MHz crystals or ceramic
resonators. The PLL can generate an 8-MHz bus frequency without
using a 32-MHz crystal.
Features
Features of the CGM include the following:
• Phase-Locked Loop with Output Frequency in Integer Multiples of
the Crystal Reference
• Programmable Hardware Voltage-Controlled Oscillator (VCO) for
Low-Jitter Operation
• Automatic Bandwidth Control Mode for Low-Jitter Operation
• Automatic Frequency Lock Detector
• CPU Interrupt on Entry or Exit from Locked Condition
MC68HC08XL36
82
Clock Generator Module (CGM)
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