MC68HC08XL36 Datasheet, PDF (220/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
SPI
DMAS —DMA Select Bit
This read/write bit selects DMA service requests when:
• The SPI receiver full bit, SPRF, becomes set and the SPI receiver
interrupt enable bit, SPIE, is also set
• The SPI transmitter empty bit, SPTE, becomes set and the SPI
transmitter interrupt enable bit, SPTIE, is also set
Setting the DMAS bit disables SPRF CPU interrupt requests and
SPTE CPU interrupt requests. Reset clears the DMAS bit.
1 = SPRF DMA and SPTE DMA service requests selected
SPRF CPU and SPTE CPU interrupt requests disabled
0 = SPRF DMA and SPTE DMA service requests disabled
SPRF CPU and SPTE CPU interrupt requests selected
SPMSTR — SPI Master Bit
This read/write bit selects master mode operation or slave mode
operation. Reset sets the SPMSTR bit.
1 = Master mode
0 = Slave mode
CPOL — Clock Polarity Bit
This read/write bit determines the logic state of the SPSCK pin
between transmissions. (See Figure 4 on page 199 and Figure 6 on
page 200.) To transmit data between SPI modules, the SPI modules
must have identical CPOL values. Reset clears the CPOL bit.
CPHA — Clock Phase Bit
This read/write bit controls the timing relationship between the serial
clock and SPI data. (See Figure 4 on page 199 and Figure 6 on page
200.) To transmit data between SPI modules, the SPI modules must
have identical CPHA values. When CPHA = 0, the SS pin of the slave
SPI module must be set to logic 1 between bytes. (See Figure 13 on
page 217.) Reset sets the CPHA bit.
MC68HC08XL36
220
Serial Peripheral Interface Module (SPI)
For More Information On This Product,
Go to: www.freescale.com
30-spi_c
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