MC68HC08XL36 Datasheet, PDF (49/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Central Processor Unit (CPU)
Instruction Set Summary
Table 1. Instruction Set Summary (Continued)
Source
Form
Operation
Description
Effect on
CCR
VH I NZC
BRA rel
Branch Always
PC ← (PC) + 2 + rel
– – – – – – REL
20 rr
3
BRCLR n,opr,rel Branch if Bit n in M Clear
PC ← (PC) + 3 + rel ? (Mn) = 0
DIR (b0) 01 dd rr 5
DIR (b1) 03 dd rr 5
DIR (b2) 05 dd rr 5
–
–
–
–
–
¤
DIR (b3)
DIR (b4)
07
09
dd rr
dd rr
5
5
DIR (b5) 0B dd rr 5
DIR (b6) 0D dd rr 5
DIR (b7) 0F dd rr 5
BRN rel
Branch Never
PC ← (PC) + 2
– – – – – – REL
21 rr
3
BRSET n,opr,rel Branch if Bit n in M Set
PC ← (PC) + 3 + rel ? (Mn) = 1
DIR (b0) 00 dd rr 5
DIR (b1) 02 dd rr 5
DIR (b2) 04 dd rr 5
–
–
–
–
–
¤
DIR (b3)
DIR (b4)
06
08
dd rr
dd rr
5
5
DIR (b5) 0A dd rr 5
DIR (b6) 0C dd rr 5
DIR (b7) 0E dd rr 5
BSET n,opr
Set Bit n in M
Mn ← 1
DIR (b0) 10 dd 4
DIR (b1) 12 dd 4
DIR (b2) 14 dd 4
–
–
–
–
–
–
DIR (b3)
DIR (b4)
16
18
dd
dd
4
4
DIR (b5) 1A dd 4
DIR (b6) 1C dd 4
DIR (b7) 1E dd 4
BSR rel
Branch to Subroutine
PC ← (PC) + 2; push (PCL)
SP ← (SP) – 1; push (PCH)
SP ← (SP) – 1
PC ← (PC) + rel
– – – – – – REL
AD rr
4
CBEQ opr,rel
CBEQA #opr,rel
CBEQX #opr,rel
CBEQ opr,X+,rel
Compare and Branch if Equal
CBEQ X+,rel
CBEQ opr,SP,rel
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (X) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 2 + rel ? (A) – (M) = $00
PC ← (PC) + 4 + rel ? (A) – (M) = $00
DIR
IMM
–
–
–
–
–
–
IMM
IX1+
IX+
SP1
31 dd rr 5
41 ii rr 4
51 ii rr 4
61 ff rr 5
71 rr
4
9E61 ff rr 6
CLC
Clear Carry Bit
C←0
– – – – – 0 INH
98
1
CLI
Clear Interrupt Mask
I←0
– – 0 – – – INH
9A
2
CLR opr
CLRA
CLRX
CLRH
CLR opr,X
CLR ,X
CLR opr,SP
Clear
M ← $00
A ← $00
X ← $00
H ← $00
M ← $00
M ← $00
M ← $00
DIR
INH
INH
0 – – 0 1 – INH
IX1
IX
SP1
3F dd 3
4F
1
5F
1
8C
1
6F ff
3
7F
2
9E6F ff
4
CMP #opr
CMP opr
CMP opr
CMP opr,X
CMP opr,X
CMP ,X
CMP opr,SP
CMP opr,SP
Compare A with M
(A) – (M)
IMM
DIR
EXT
¤
–
–
¤
¤
¤
IX2
IX1
IX
SP1
SP2
A1 ii
2
B1 dd 3
C1 hh ll 4
D1 ee ff 4
E1 ff
3
F1
2
9EE1 ff
4
9ED1 ee ff 5
COM opr
COMA
COMX
COM opr,X
COM ,X
COM opr,SP
Complement (One’s Complement)
M ← (M) = $FF – (M)
A ← (A) = $FF – (M)
X ← (X) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
DIR
INH
0
–
–
¤
¤
1
INH
IX1
IX
SP1
33 dd 4
43
1
53
1
63 ff
4
73
3
9E63 ff
5
11-cpu8_a
MOTOROLA
Central Processor Unit (CPU)
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MC68HC08XL36
49