MC68HC08XL36 Datasheet, PDF (281/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Input/Output Ports
Port D
DDRD7–DDRD0 — Data Direction Register D Bits
These read/write bits control port D data direction. Reset clears
DDRD7–DDRD0, configuring all port D pins as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
NOTE: Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
Figure 13 shows the port D I/O logic.
READ DDRD ($0007)
WRITE DDRD ($0007)
RESET
DDRDx
WRITE PORTD ($0003)
PDx
PDx
READ PORTD ($0003)
Figure 13. Port D I/O Circuit
When bit DDRDx is a logic 1, reading address $0003 reads the PDx data
latch. When bit DDRDx is a logic 0, reading address $0003 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit. Table 5 summarizes the operation of
the port D pins.
Table 5. Port D Pin Operation
Data Direction Bit
I/O Pin Mode
0
Input, high-impedance
1
Output
1. Writing affects data register, but does not affect input.
Access to Data Bit
Read
Pin
Write
Latch⁽¹⁾
Latch
Latch
11-ports_a
MOTOROLA
Input/Output Ports
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MC68HC08XL36
281