MC68HC08XL36 Datasheet, PDF (251/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Serial Communications Interface Module (SCI)
SCI During Break Module Interrupts
SCI During Break Module Interrupts
The BCFE bit in the break flag control register (BFCR) enables software
to clear status bits during the break state. (See Break Module (BRK) on
page 141.)
To allow software to clear status bits during a break interrupt, write a
logic 1 to the BCFE bit. If a status bit is cleared during the break state, it
remains cleared when the MCU exits the break state.
To protect status bits during the break state, write a logic 0 to the BCFE
bit. With BCFE at logic 0 (its default state), software can read and write
I/O registers during the break state without affecting status bits. Some
status bits have a two-step read/write clearing procedure. If software
does the first step on such a bit before the break, the bit cannot change
during the break state as long as BCFE is at logic 0. After the break,
doing the second step clears the status bit.
25-sci_d
MOTOROLA
Serial Communications Interface Module (SCI)
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MC68HC08XL36
251