MC68HC08XL36 Datasheet, PDF (356/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Index
Freescale Semiconductor, Inc.
P
PE bit (SCI receiver parity error bit) . . . . .266
PEIE bit (SCI receiver parity error interrupt en-
able bit) . . . . . . . . . . . . . . . . . . . . .261
PEN bit (SCI parity enable bit) . . . . . . . . .255
phase-locked loop (PLL) . . . . . . . . . . . . . .85
acquisition mode . . . . . . . . . . . . . . . . . .87
automatic bandwidth mode . . . . . . . . . .87
lock detector . . . . . . . . . . . . . . . . . . . . .85
loop filter . . . . . . . . . . . . . . . . . . . . . . . .85
manual bandwidth mode . . . . . . . . . . . .87
phase detector . . . . . . . . . . . . . . . . . . .85
programming . . . . . . . . . . . . . . . . . . . . .89
tracking mode . . . . . . . . . . . . . . . . . . . .87
voltage-controlled oscillator (VCO) . . . .85
PIN bit (external reset bit) . . . . . . . . . . . . . .59
pinout
QFP . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
SDIP . . . . . . . . . . . . . . . . . . . . . . . . . . .15
PLL bandwidth control register (PBWC) . . .96
PLL control register (PCTL) . . . . . . . . . . . .94
PLL programming register (PPG) . . . . . . . .98
PLLF bit (PLL interrupt flag bit) . . . . . . . . .95
PLLIE bit (PLL interrupt enable bit) . . . . . .95
PLLON bit (PLL on bit) . . . . . . . . . . . . . . . .95
POR bit (power-on reset bit) . . . . . . . . . . . .59
port A data register (PORTA) . . . . . . . . . .274
port B data register (PORTB) . . . . . . . . . .276
port C data register (PORTC) . . . . . . . . . .278
port D data register (PORTD) . . . . . . . . . .280
port E data register (PORTE) . . . . . . . . . .282
port F data register (PORTF) . . . . . . . . . .285
port G data register (PORTG) . . . . . . . . .288
port H data register (PORTH) . . . . . . . . . .291
power supply
bypassing . . . . . . . . . . . . . . . . . . . . . . .17
pins . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
program counter (PC) . . . . . . . . . . . . . . . . .43
branch instructions . . . . . . . . . . . . . . . .43
jump instructions . . . . . . . . . . . . . . . . . .43
PS2–PS0 bits (TIM prescaler select bits) .180
PSHH instruction . . . . . . . . . . . . . . . . . . . .45
PTY bit (SCI parity bit) . . . . . . . . . . . . . . .255
PULH instruction . . . . . . . . . . . . . . . . . . . .45
pulse-width modulation (PWM) . . . . . . . .171
R
R8 bit (SCI received bit 8) . . . . . . . . . . . .260
RE bit (SCI receiver enable bit) . . . . . . . .258
reset
computer operating properly module
(COP) . . . . . . . . . . . . . . . . . . . .293
COP reset . . . . . . . . . . . . . . . . . . . . . . .58
external reset . . . . . . . . . . . . . . . . . . . .56
external reset pin (RST) . . . . . . . . . . . .18
illegal address reset . . . . . . . . . . . . . . .58
illegal opcode reset . . . . . . . . . . . . . . . .58
internal . . . . . . . . . . . . . . . . . . . . . . . . .18
low-voltage inhibit module (LVI) . . . . .317
LVI reset . . . . . . . . . . . . . . . . . . . . . . . .58
power-on reset . . . . . . . . . . . . . . . . . . .57
reset stack pointer instruction (RSP) . . . . .35
reset status register (RSR) . . . . . . . . . . . . .59
RPF bit (SCI reception in progress flag bit) . .
267
RTI instruction . . . . . . . . . . . . . . . . . . . . . .45
RWU bit (SCI receiver wake-up bit) . . . . .258
S
SBK bit (SCI send break bit) . . . . . . . . . .259
SCI baud rate
misalignment tolerance . . . . . . . . . . . .243
selection . . . . . . . . . . . . . . . . . . . . . . .268
SCI baud rate register (SCBR) . . . . . . . . .268
SCI character format . . . . . . . . . . . . . . . .255
SCI control register 1 (SCC1) . . . . . . . . .253
SCI control register 2 (SCC2) . . . . . . . . .256
SCI control register 3 (SCC3) . . . . . . . . .259
SCI data register (SCDR) . . . . . . . . . . . . .267
SCI framing error . . . . . . . . . . . . . . . . . . .243
SCI noise error . . . . . . . . . . . . . . . . . . . . .247
SCI overrun error . . . . . . . . . . . . . . . . . . .247
SCI parity error . . . . . . . . . . . . . . . . . . . . .248
SCI status register 1 (SCS1) . . . . . . . . . .262
SCI status register 2 (SCS2) . . . . . . . . . .266
SCP1–SCP0 bits (SCI baud rate prescaler
MC68HC08XL36
356
Index
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