MC68HC08XL36 Datasheet, PDF(325/362 Page) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

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MC68HC08XL36 Datasheet, PDF (325/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

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Freescale Semiconductor, Inc.

Specifications

Preliminary Electrical Specifications

Table 5. DC Electrical Characteristics (VDD =3.0 Vdc Â± 10%) (1)

Characteristic

Output High Voltage

(ILoad = â 1.0 mA) All Ports

Output Low Voltage

(ILoad = 0.8 mA) All Ports

Symbol

Min

Typ(2)

VOH

VDD â 0.8

â

VOL

â

â

Max

â

0.4

Unit

V

V

Input High Voltage

All ports, IRQs, RESET, OSC1

Input Low Voltage

All ports, IRQs, RESET, OSC1

VDD Supply Current

Run(3)

Wait(4)

VIH

0.7 x VDD

â

VDD

V

VIL

VSS

â

0.2 x VDD V

â

â

â

10

mA

â

â

6

mA

Stop(5)

25Â°C

0Â° to 85Â°

25Â°C with LVI Enabled

0Â° to 85Â° with LVI Enabled

IDD

â

â

3

ÂµA

â

â

10

ÂµA

â

â

200

ÂµA

â

â

250

ÂµA

I/O Ports Hi-Z Leakage Current

IIL

â

â

Â± 10

ÂµA

Input Current

IIN

â

â

1

ÂµA

Capacitance

Ports (as Input or Output)

COUT

â

CIN

â

â

12

pF

â

8

pF

Low Voltage Reset Inhibit

VLVII

2.6

2.7

2.8

V

Low Voltage Reset Inhibit/Recover

Hysteresis

HLVI

60

80

100

mV

POR ReArm Voltage(6)

POR Reset Voltage(7)

VPOR

0

VPORRST

0

â

200

mV

700

800

mV

POR Rise Time Ramp Rate(8)

RPOR

0.02

â

â

V/m

s

1. VDD = 3.0 Vdc Â± 10%, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted.

2. Typical values reflect average measurements at midpoint of voltage range, 25Â°C only.

3. Run (operating) IDD measured using external square wave clock source (fosc = 16.4 MHz). All inputs 0.2V from

rail. No dc loads. Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2

capacitance linearly affects run IDD. Measured with all modules enabled.

4. Wait IDD measured using external square wave clock source (fosc = 16.4 MHz). All inputs 0.2 V from rail. No dc

loads. Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance

linearly affects Wait IDD. Measured with PLL and LVI enabled.

5. Stop IDD measured with OSC1 = VSS.

6. Maximum is highest voltage that POR is guaranteed.

7. Maximum is highest voltage that POR is possible.

8. If minimum VDD is not reached before the poer-on reset is released, RST must be driven low externally until min-

imum VDD is reached.

5-spec_b

MOTOROLA

Specifications

For More Information On This Product,

Go to: www.freescale.com

MC68HC08XL36

325

▷